
PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 47
8.7
Time-out Sequence and Power-down
Status Bits (TO/PD)
First PWRT time-out is invoked after a POR has
expired. Then the OST is activated. The total time-out
will vary based on oscillator configuration and PWRTE
configuration bit status. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
TABLE 8-5
TIME-OUT IN VARIOUS
SITUATIONS
Since the time-outs occur from the POR reset pulse, if
MCLR is kept low long enough, the time-outs will
expire. Then bringing MCLR high, execution will begin
purposes or to synchronize more than one PIC16F8X
device when operating in parallel.
Table 8-6 shows the significance of the TO and PD bits.
Table 8-3 lists the reset conditions for some special
registers, while
Table 8-4 lists the reset conditions for
all the registers.
TABLE 8-6
STATUS BITS AND THEIR
SIGNIFICANCE
8.8
Reset on Brown-Out
A brown-out is a condition where device power (VDD)
dips below its minimum value, but not to zero, and then
recovers. The device should be reset in the event of a
brown-out.
To reset a PIC16F8X device when a brown-out occurs,
external brown-out protection circuits may be built, as
FIGURE 8-14: BROWN-OUT PROTECTION
CIRCUIT 1
FIGURE 8-15: BROWN-OUT PROTECTION
CIRCUIT 2
Oscillator
Configuration
Power-up
Wake-up
from
SLEEP
PWRT
Enabled
PWRT
Disabled
XT, HS, LP
72 ms +
1024TOSC
RC
72 ms
——
TO
PD
Condition
11
Power-on Reset
0x
Illegal, TO is set on POR
x0
Illegal, PD is set on POR
01
WDT Reset (during normal operation)
00
WDT Wake-up
11
MCLR Reset during normal operation
10
MCLR Reset during SLEEP or interrupt
wake-up from SLEEP
This circuit will activate reset when VDD goes below
(Vz + 0.7V) where Vz = Zener voltage.
VDD
33k
10k
40k
VDD
MCLR
PIC16F8X
This brown-out circuit is less expensive, although less
accurate. Transistor Q1 turns off when VDD is below a
certain level such that:
VDD
R1
R1 + R2
= 0.7V
R2
40k
VDD
MCLR
PIC16F8X
R1
Q1
VDD